1. Field of Invention
The present invention relates to a shielding structure, and more particularly, to a mirror image shielding structure.
2. Related Art
Conventionally, passive components are disposed on the surface of the common printed circuit board (PCB) or on the surface of the substrate of semiconductor chips. However, with the development trend towards high functionality and small size of electronic products, the lamination technique for circuit boards has come to require the features of thin thickness, multiple layers, and high-density, and so on. Therefore, to create more space and to improve the multi-functionality of the module in a limited substrate area, the circuit layout has been shortened and the signal transmission distance reduced by reducing the size of passive components or by embedding passive components. Thus, extra space is created to accommodate active components and the overall performance of elements is improved, and thereby, the substrate structure of embedded passive components resistors, capacitors, and inductors) has been developed.
However, the electrical quality of the elements embedded in the inner layer is critical in designing a circuit module with desirable electrical characteristics under this architecture. To achieve a high-density package, the gap between elements must be reduced. Therefore, after the embedded elements are embedded therein through many different ways, a number of stray parasitic effects will occur. Moreover, as an element gets closer and closer to elements (e.g., signal transmission lines, capacitors, and inductors) in the layers above and below, and as more composite materials are used, the overall coupling effect inevitably increases, which causes cross talk phenomena such as signal distortion, and further influences signal integrity (SI).
In the conventional architecture of substrate with embedded elements, an overall metal layer or an overall metal mesh is typically used to form the overall metal shielding plane 120′, as shown in FIG. 1 (dielectric layers are not shown in the figure for convenience of illustration). However, a large number of unnecessary parasitic effects 140 will thus occur due to the shielding plane, and parasitic capacitance is formed accordingly. Moreover, using overall metal layers or overall metal meshes wastes materials and occupies a large area.
For example, referring to U.S. Pat. No. 6,066,537, a plurality of vertical contact metals is disposed around a capacitor; next, a shielding diffusion block is formed in the substrate relative to the capacitor; then, the vertical contact metal is connected to the shielding diffusion block and to a ring-shaped metal wire connected to an external static voltage source; and thus, a shielding structure is formed around the capacitor. However, with this structure, the capacitor must pass around or pass through the shielding structure by means of a crossover line or a hole, so as to connect to external circuits. Therefore, though the capacitor can be effectively shielded, the high-frequency electrical characteristics thereof are destroyed due to the connection of the entire plane of metals, and a large area is occupied by the shielding structure.
Accordingly, to apply embedded elements in various circuits and to maintain the signal integrity, the elimination of coupling effects between elements is the most important object. Therefore, it is still a crucial issue for those skilled in the art to provide a shielding layout that is suitable for any embedded element, and has desirable electrical characteristics, and may be used to effectively prevent coupling effects.